Sanghamitra Roy

Electrical and Computer Engineering

Associate Professor


Sanghamitra  Roy

Contact Information

Office Location: EL 255C
Phone: 435-797-9156
Email: sanghamitra.roy@usu.edu
Website: /ece/faculty-sites/bridge-lab/people/faculty/sroy/index.php
Curriculum Vitae: Download

Educational Background

PhD, University of Wisconsin-Madison, 2008
MS, Northwestern University, 2003
BS, Jadavpur University, 2001

Research Interests

VLSI Design Automation Circuit-Architectural Co-design

Awards

Outstanding Researcher of the Year, 2020

Utah State University, ECE

Best Paper Nomination at Design Automation and Test in Europe, 2018

ACM DATE 2018

125 People of Impact, 2016

University of Madison-Wisconsin

Early Career Award, 2015

USU Center of Women and Gender (CWG)

Best Paper Award Nomination, 2014 ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis, 2014

ACM/IEEE

NSF CAREER Award, 2013

National Science Foundation

Outstanding Researcher of the Year, 2013

Electrical and Computer Engineering, Utah State University

Outstanding Undergraduate Mentor, 2013

Electrical and Computer Engineering, Utah State University

Co-Author of Best Paper Award Finalist, 2012

30th IEEE International Conference on Computer Design (ICCD)

Best Paper Award Nomination , 2011

IEEE Design Automation and Test in Europe Conference

Biography has been selected for publication, 2011

2011 Edition of Marquis Who’s Who in America

Co-Author of Best Paper Award Finalist Article, 2011

IEEE International Conference on Design Automation and Test in Europe

Co-Author of Best Paper Award Finalist article, 2010

IEEE/ACM 23rd International Conference on VLSI Design

Name Listed, 2009

AcademicKeys Who’s Who in Engineering Higher Education

Nominated for ACM Outstanding PhD Dissertation Award by University of Wisconsin-Madison, 2009

University of Wisconsin-Madison

PhD Dissertation Selected, 2008

11th Annual ACM SIGDA Ph.D. Forum at Design Automation Conference

Lead Author of Best Paper Award FinalistAarticle, 2005

IEEE/ACM International Conference on Computer Aided Design

University Gold Medal, 2001

Jadavpur University 2001

Walter P. Murphy Fellowship, 2001

Department of Electrical and Computer Engineering, Northwestern University.

Annapurna Memorial Prize, 1999

Jadavpur University

Asoke Memorial Medal, 1999

Jadavpur University

M.N. Chakraborty Medal, 1999

Jadavpur University

Winner of Prof. H.C. GuhaMemorial Award 1999-2000, 1999

Jadavpur University

Eveready Scholarship, 1998


    Publications | Book Chapters

  • Sridevi, R.J, Chakraborty, K., Roy, S., (2017). Hardware Trojan Attacks in SoC and NoC: The Hardware Trojan War. Springer, Cham
  • Roy, S., Chen, C.C, (2008). Wire Sizing: Handbook of Algorithms for Physical Design Automation. CRC Press

An asterisk (*) at the end of a publication indicates that it has not been peer-reviewed.

Publications | Journal Articles

Academic Journal

  • Sanyal, S., Basu, P., Bal, A., Roy, S., Chakraborty, K., Exploring Warp Criticality in Near-Threshold GPGPU Applications using a Dynamic Choke Point Analysis. IEEE Transactions on Very Large Scale Integration Systems (TVLSI), doi: 10.1109/TVLSI.2019.2943450
  • Rajamanikkam, C., JS, R., Roy, S., Chakraborty, K., (2019). Energy Efficient Network-on-Chip Architectures for Many-core Near-Threshold Computing System. Journal of Low Power Electronics (JOLPE), 15:2, 115-128.
  • JS, R., Rajamanikkam, C., Chakraborty, K., Roy, S., (2019). Securing Data-Center against Power Attacks. Journal of Hardware and Systems Security (HASS), 15:2, 177-188.
  • Bal, A., Saha, S., Roy, S., Chakraborty, K., (2018). Dynamic Choke Sensing for Timing Error Resilience in NTC Systems. IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 26:1, 1-10. doi: 10.1109/TVLSI.2017.2752963
  • Basu, P., R, C., Bal, A., Pandey, P., Carter, T., Chakraborty, K., Roy, S., (2017). FIFA: Exploring a Focally Induced Fault Attack Strategy in Near-Threshold Computing. IEEE Embedded System Letters (ESL)99, doi: 10.1109/LES.2017.2783240
  • Basu, P., JayashankaraShridevi, R., Chakraborty, K., Roy, S., (2017). IcoNoClast: Tackling Voltage Noise in the NoC Power Supply Through Flow-Control and Routing Algorithms. IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 25:7, 2035-2044. doi: 10.1109/TVLSI.2017.2673808
  • Rajamanikkam, C., Brenning, K., Deakin, A., Chakraborty, K., Roy, S., TASPDetect: Reviving Trust in 3PIP by Detecting TASP Trojans. Microprocessors and Microsystems (MICPRO), 56, 76-83. doi: https://doi.org/10.1016/j.micpro.2017.11.001
  • Pal, A., Bal, A., Chakraborty, K., Roy, S., (2017). Split Latency Allocator: Process Variation-Aware Register Access Latency Boost in a Near-Threshold Graphics Processing Unit. Journal of Low Power Electronics (JOLPE), 13:3, 419-427. doi: https://doi.org/10.1166/jolpe.2017.1508
  • JayashankaraShridevi, R., Ancajas, D.M, Chakraborty, K., Roy, S., (2017). Security Measures Against a Rogue Network-on-Chip. Journal of Hardware and Systems Security (HASS), 1:2, 173-187.
  • Saha, S., Basu, P., Rajamanikkam, C., Bal, A., Chakraborty, K., Roy, S., (2017). SSAGA: SMs Synthesized for Asymmetric GPGPU Applications. ACM Transactions on Design Automation of Electronic Systems (TODAES), 22:3, doi: 10.1145/3014163
  • Basu, P., Pandey, P., Bal, A., Rajamanikkam, C., Chakraborty, K., Roy, S., TITAN: Uncovering the Paradigm Shift in Security Vulnerability at Near-Threshold Computing. IEEE Transactions on Emerging Topics in Computing (TETC)99, doi: 10.1109/TETC.2018.2794070
  • Chen, H., Roy, S., Chakraborty, K., (2015). DARP-MP: Dynamically Adaptable Resilient Pipeline Design in Multicore Processors. ACM Transactions on Design Automation of Electronic Systems (TODAES), 21:3, doi: 10.1145/2755558
  • Mugisha, D., Chen, H., Roy, S., Chakraborty, K., (2015). Resilient Cache Design for Mobile Processors in the Near-Threshold Regime. Journal of Low Power Electronics (JOLPE), 11:2, 112 - 120. doi: 10.1166/jolpe.2015.1380
  • Allred, J., Roy, S., Chakraborty, K., (2014). Dark Silicon Aware Multicore Systems: Employing Design Automation with Architectural Insight. IEEE Transactions on Very Large Scale Integration Systems, 22:5, 1192 - 1196. doi: 10.1109/TVLSI.2013.2265338
  • Bhardwaj, K., Ancajas, D.M, Chakraborty, K., Roy, S., (2014). Wearout Resilience in NoCs through an Aging Aware Adaptive Routing Algorithm. IEEE Transactions on Very Large Scale Integration Systems, 23:2, 369 - 373. doi: 10.1109/TVLSI.2014.2305335
  • Han, Y., Ancajas, D.M, Chakraborty, K., Roy, S., (2014). Exploring High Throughput Computing Paradigm for Global Routing. IEEE Transactions on Very Large Scale Integration Systems, 22:1, 155 - 167 . doi: 10.1109/TVLSI.2012.2234489
  • Desai, S., Roy, S., (2013). Using Adaptive Body Biasing for Robust Process Variation Aware DRAM Design. Journal of Low Power Electronics, 9:1, 23 - 36. doi: http://dx.doi.org/10.1166/jolpe.2013.1237
  • Chakraborty, K., Roy, S., (2013). Architecturally Homogeneous Power-Performance Heterogeneous Multicore Systems. IEEE Transactions on Very Large Scale Integration Systems, 21:4, 670 - 679 . doi: 10.1109/TVLSI.2012.2199142
  • Chakraborty, K., Roy, S., (2012). Architecturally Homogeneous Power-Performance Heterogeneous Multicore Systems. IEEE Transactions on Very Large Scale Integration Systems, 1-10. doi: 10.1109/TVLSI.2012.2199142
  • Roy, S., Chakraborty, K., (2012). Maximizing Energy Efficiency in 3D Multicore Systems: A Formalized Approach. International Journal of Electronics, 100:2, 150-170. doi: 10.1080/00207217.2012.687183
  • Kothawade, S., Chakraborty, K., Roy, S., Han, Y., (2012). Analysis of Intermittent Timing Fault Vulnerability. Elsevier Journal of Microelectronics Reliability, 52:7, 1515-1522. doi: 10.1016/j.microrel.2012.03.003
  • Chakraborty, K., Roy, S., (2012). Stack Aware Threshold Voltage Assignment in 3D Multicore Designs. IEEE Transactions on Very Large Scale Integration Systems, 20:3, 512 - 522. doi: 10.1109/TVLSI.2011.2105513
  • Padmavar, M., Roy, S., Chakraborty, K., (2011). Microprocessor Power Supply Noise Aware Floorplanning using a Circuit-Architectural Framework. Journal of Low Power Electronics, 7:3, 303 - 313. doi: 10.1166/jolpe.2011.1140
  • Han, Y., Chakraborty, K., Roy, S., Kuntamukkala, V., (2011). Design and Implementation of a Throughput Optimized GPU Floorplanning Algorithm. ACM Transactions on Design Automation of Electronic Systems, 16:3, 23:1 - 23:21. doi: 10.1145/1970353.1970356
  • Roy, S., Chakraborty, K., (2011). Exploiting Dynamic Micro-Architecture Usage in Gate Sizing . Elsevier Microprocessors and Microsystems, 35:4, 417 - 425. doi: 10.1016/j.micpro.2011.03.002
  • Chakraborty, K., Roy, S., (2010). A Novel Threshold Voltage Assignment for 3D Multicore Design. Journal of Low Power Electronics, 6:4, 436 - 446. doi: 10.1166/jolpe.2010.1091
  • Roy, S., Chen, W., Chen, C.C, Hu, Y.H, (2007). Numerically Convex Forms and Their Application in Gate-sizing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 26:9, 1637-1647. doi: 10.1109/TCAD.2007.895793
  • Roy, S., Banerjee, P., (2005). An Algorithm for Trading off Quantization Error with Hardware Resources for MATLAB based FPGA Design. IEEE Transactions of Computers, 54:7, 886 - 896. doi: 10.1109/TC.2005.106
  • Sarkar, B., Roy, S., Sarkar, D., (2003). Hierarchical Representation of digitized curves through dominant point detection. Pattern Recognition Letters, 24:15, 2869 - 2882. doi: 10.1016/S0167-8655(03)00145-4

An asterisk (*) at the end of a publication indicates that it has not been peer-reviewed.

Publications | Other

An asterisk (*) at the end of a publication indicates that it has not been peer-reviewed.

Teaching

ECE 6460, 5460 - VLSI Design Automation, Fall 2019
ECE 6800 - Electrical Engineering Colloquium, Spring 2019
ECE 5470, 6470 - VLSI Design, Spring 2019
ECE 5480, 6480 - VLSI Testing and Verification, Spring 2019
ECE 6800 - Electrical Engineering Colloquium, Fall 2018
ECE 5460, 6460 - VLSI Design Automation, Fall 2018
ECE 6800 - Electrical Engineering Colloquium, Spring 2018
ECE 5470, 6470 - VLSI Design, Spring 2018
ECE 5480, 6480 - VLSI Testing and Verification, Spring 2018
ECE 6800 - Electrical Engineering Colloquium, Fall 2017
ECE 6800 - Electrical Engineering Colloquium, Spring 2017
ECE 5930, 6930 - Special Topics in Electrical and Computer Engineering, Spring 2017
ECE 5470, 6470 - VLSI Design, Spring 2017
ECE 6800 - Electrical Engineering Colloquium, Fall 2016
ECE 5460, 6460 - VLSI Design Automation, Fall 2016
ECE 5930, 6930 - Special Topics in Electrical and Computer Engineering, Spring 2016
ECE 5470, 6470 - VLSI Design, Spring 2016
ECE 5460, 6460 - VLSI Design Automation, Fall 2015
ECE 6930 - Special Topics in Electrical Engineering, Spring 2015
ECE 5470,6470 - VLSI Design, Spring 2015
ECE 5460,6460 - VLSI Design Automation, Fall 2014
ECE 6930 - Special Topics in Electrical Engineering, Spring 2014
ECE 5470,6470 - VLSI Design, Spring 2014
ECE 5460,6460 - VLSI Design Automation, Fall 2013
ECE 5470,6470 - VLSI Design, Spring 2013
ECE 5530 - Digital System Design, Fall 2012
ECE 5460,6460 - VLSI Design Automation, Fall 2012
ECE 6470 - VLSI Design, Spring 2012
ECE 5530 - Digital System Design, Fall 2011
ECE 5460,6460 - VLSI Design Automation, Fall 2011
ECE 5530 - Digital System Design, Fall 2010
ECE 5530 - Digital System Design, Fall 2010
ECE 5530 - Digital System Design, Fall 2010
ECE 5530 - Digital System Design, Fall 2010
ECE 5460 - VLSI Design Automation, Fall 2010
ECE 6460 - VLSI Design Automation, Fall 2010
ECE 6460 - VLSI Design Automation, Fall 2010

Graduate Students Mentored

Noel Daniel Gundi, Electrical & Computer Engineering, November 2018
Pramesh Pandey, Electrical & Computer Engineering, November 2016
Chidhambaranathan Rajamanikkam, Electrical & Computer Engineering, March 2019 - August 2019
Sourav Sanyal, Electrical & Computer Engineering, October 2017 - June 2019
Heidi Marie Russell, Electrical & Computer Engineering, April 2018 - May 2019
Aatreyi Bal, Electrical & Computer Engineering, November 2015 - March 2019
Atif Yasin, Electrical & Computer Engineering, August 2014 - December 2016
Hu Chen, Electrical & Computer Engineering, August 2012 - August 2016
Dieudonne Manzi Mugisha , Electrical & Computer Engineering, August 2013 - November 2015
Saptarshi Mallick, Electrical & Computer Engineering, October 2013 - December 2014
Jason Morgan Allred, Electrical & Computer Engineering, August 2011 - August 2013
Satyajit Desai, Electrical & Computer Engineering, August 2010 - December 2012