Project

Software emulators can only simulate the behavior of a game console. A hardware emulator can perfectly recreate it. This system is a cycle-accurate emulation of the original NES hardware

• Custom CPU and Picture Processing Unit (PPU)
• VGA game output with no stuttering
• Python menu allowing simple game switching
• Custom connectors for original NES controllers

System

Methods

Design and Hardware:

• Core Logic: Implemented in Verilog and synthesized onto a Basys3 FPGA
• Controller Interface: Original NES ports soldered to a PMOD connector to interface with the FPGA
• Video Output: A dual-port RAM buffers data between the PPU and VGA, also scaling the 256x224 resolution to a 512x448 VGA output

Data Processing:

• ROM Loading: A custom Python script parses game ROM headers and transmits the configuration and data to the FPGA using UART
• System Execution: The 6502 CPU executes program code and passes background and sprite data to the PPU for pixel rendering

Conclusion

Results:

• Successfully plays NES games using mappers 0 through 3, with accurate video rendering to VGA and original controller input

What I Learned:

• Designing complex and parallel hardware systems
• Implementing UART to transfer large data files to an FPGA
• Reverse-engineering and interfacing with old hardware standards

Future Improvements:

• Add support for games with persistent save data
• Implement the Audio Processing Unit (APU) to add sound support
• Add logic for more complex memory mappers to support more games