Publications

Conference

1. DAC-23: Noel Daniel Gundi, Zinnia Muntaha Mowri, Andrew Chamberlin, Sanghamitra Roy and Koushik Chakraborty, "STRIVE: Enabling Choke Point Detection and Timing Error Resilience in a Low-Power Tensor Processing Unit", Proceedings of the 60th Design Automation Conference,  July 2023 (ACCEPTED)

Journal

1. JLPEA-22: Noel Daniel Gundi, Pramesh Pandey, Sanghamitra Roy and Koushik Chakraborty, "Implementing a Timing Error-Resilient and Energy-Efficient Near-Threshold Hardware Accelerator for Deep Neural Network Inference", Journal of Low Power Electronics and Applications (JLPEA), Volume 12, Issue 2, pp. 32, June 2022

Journal

1. HASS-21: Chidhambaranathan Rajamanikkam, Rajesh JayashankaraShridevi, Sanghamitra Roy and Koushik Chakraborty, "Understanding Security Threats in Emerging Neuromorphic Computing Architecture", Journal of Hardware and Systems Security, 2021
2. TVLSI-21: Noel Daniel Gundi, Tahmoures Shabanian, Prabal Basu, Pramesh Pandey, Sanghamitra Roy and Koushik Chakraborty, "EFFORT: A Comprehensive Technique to Tackle Timing Violations and Improve Energy Efficiency of Near-Threshold Tensor Processing Units", IEEE Transactions on Very Large Scale Integration Systems (TVLSI)

Conference

1. DAC-21: Pramesh Pandey, Noel Daniel Gundi, Sanghamitra Roy and Koushik Chakraborty, "UPTPU: Improving Energy
   Efficiency of a Tensor Processing Unit through Underutilization Based Power-Gating", Proceedings of the 58th Design Automation Conference,  December 2021 (ACCEPTED)
2. FMIC-21: Riley Roberts, Benjamin Lewis, Arnd Hartmanns, Prabal Basu, Sanghamitra Roy, Koushik Chakraborty and Zhang Zhen, “Probabilistic Verification for Reliability of a Two-by-Two Network-on-Chip System”, Lecture Notes in Computer Science,  Cham: Springer International Publishing, 2021,  Chapter 16, pp- 232-248.  https://link.springer.com/10.1007/978-3-030-85248-1_16

Journal

1. TVLSI-20: Pramesh Pandey, Prabal Basu, Koushik Chakraborty and Sanghamitra Roy “GreenTPU: Predictive Design Paradigm for Improving Timing Error Resilience of a Near-Threshold Tensor Processing Unit”,  IEEE Transactions on Very Large Scale Integration Systems (TVLSI)
2. JLPEA-20: Pramesh Pandey, Noel Daniel Gundi, Prabal Basu, Tahmoures Shabanian, Mitchell Patrick, Koushik Chakraborty and Sanghamitra Roy, "Challenges and Opportunities in Near Threshold DNN Accelerators around Timing Errors", Journal of Low Power Electronics and Applications (JLPEA), Volume 10, Issue 4, pp. 33, October 2020

Conference

1. ASPDAC-20: Noel Daniel Gundi, Tahmoures Shabanian, Prabal Basu, Pramesh Pandey, Koushik Chakraborty, Sanghamitra Roy, and Zhen Zhang "EFFORT: Enhancing Energy Efficiency and Error Resilience of a Near-Threshold Tensor Processing Unit", Asia and South Pacific Design Automation Conference (ASPDAC-2020) (ACCEPTED)

Journal

1. HASS-19: Rajesh JayashankaraShridevi, Chidhambaranathan Rajamanikkam, Koushik Chakraborty and Sanghamitra Roy, "Securing Data-Center against Power Attacks.",Journal of Hardware and Systems Security (64), 2019
2. JOLPE-2019: Chidhambaranathan R, Rajesh JayashankaraShridevi, Sanghamitra Roy, and Koushik Chakraborty "Energy Efficient Network-on-Chip Architectures for Many-core Near-Threshold Computing System", Journal of Low Power Electronics Vol. 15, June 2019
3. TVLSI-19: Sourav Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy and Koushik Chakraborty “Exploring Warp Criticality in Near-Threshold GPGPU Applications using a Dynamic Choke Point Analysis”,  IEEE Transactions on Very Large Scale Integration Systems (TVLSI) 

Conference

1. DAC-19: Pramesh Pandey, Prabal Basu, Sanghamitra Roy, and Koushik Chakraborty, "GreenTPU: Improving Timing Error Resilience of a Near-Threshold Tensor Processing Unit", Proceedings of the IEEE/ACM Design Automation Conference, LV, June 2019 (ACCEPTED)
2. DATE-19: Sourav Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy, and Koushik Chakraborty, "Predicting Critical Warps in Near-Threshold GPGPU Applications using a Dynamic Choke Point Analysis", Proceedings of the IEEE/ACM Design Automation and Test in Europe, March 2019. (ACCEPTED)
3. FMICS-19: Benjamin Lewis, Arnd Hartmanns, Prabal Basu, Rajesh JS, Koushik Chakraborty, Sanghamitra Roy, Zhen Zhang, "Probabilistic Verification for Reliable Network-on-Chip System Design", Formal Methods for Industrial Critical Systems, Amsterdam, The Netherlands, August 2019 (Accepted).

Journal

1. MICPRO-18 :Chidhambaranathan R, Kurt Brenning, Andrew Deakin,Sanghamitra Roy, Koushik Chakraborty, "TASPDetect: Reviving Trust in 3PIP By Detecting TASP Trojans",Microprocessors and Microsystems - Embedded Hardware Design 56, 2018
2. TETC-18:Prabal Basu, Pramesh Pandey, Aatreyi Bal, Chidhambaranathan Rajamanikkam,Koushik Chakraborty, Sanghamitra Roy, "TITAN: Uncovering the Paradigm Shift in Security Vulnerability at Near-Threshold Computing",IEEE Transactions on Emerging Topics in Computing, January 2018
3. TVLSI-18: Aatreyi Bal, Sanghamitra Roy, and Koushik Chakraborty, "Trident: Comprehensive Choke Error Mitigation in NTC Systems", IEEE Transactions on Very Large Scale Integration Systems, 2018

Conference

1. DATE-18: Aatreyi Bal, Sanghamitra Roy, and Koushik Chakraborty, "Trident: A Comprehensive Timing Error Resilient Technique against Choke Points at NTC",Proceedings of theIEEE/ACM Design Automation and Test in Europe, March 2018. (ACCEPTED with Best Paper Nomination)
2. ISLPED-18: Pramesh Pandey, Asmita Pal, Koushik Chakraborty, Sanghamitra Roy, "Reliability and Uniformity Enhancement in 8T-SRAM based PUFs operating at NTC. ", International Symposium on Low Power Electronics and Design, July 23–25, 2018, Seattle,WA, USA. (ACCEPTED)
3. ISLPED-18: Tahmoures Shabanian, Aatreyi Bal, Prabal Basu, Koushik Chakraborty, Sanghamitra Roy, "ACE-GPU: Tackling Choke Point Induced Performance Bottlenecks in a Near-Threshold Computing GPU", International Symposium on Low Power Electronics and Design, July 23–25, 2018, Seattle,WA, USA. (ACCEPTED)

Book Chapter

1. JS Rajesh., Chakraborty Koushik., Roy Sanghamitra. (2018) Hardware Trojan Attacks in SoC and NoC. In: Bhunia S., Tehranipoor M. (eds) The Hardware Trojan War. Springer, C (Link: https://link.springer.com/chapter/10.1007/978-3-319-68511-3_3  )

Journal

1. TODAES-17: Shamik Saha, Prabal Basu, Chidhambaranathan R, Aatreyi Bal, Koushik Chakraborty, and Sanghamitra Roy, "SSAGA: SMs Synthesized for Asymmetric GPGPU Applications", ACM Transactions on Design Automation of Electronic Systems, January 2017
2. TVLSI-17:Prabal Basu, Rajesh JayashankaraShridevi, Koushik Chakraborty and Sanghamitra Roy,"IcoNoClast: Tackling Voltage Noise in the NoC Power Supply Through Flow-Control and Routing Algorithms",IEEE Transactions on Very Large Scale Integration Systems, 2017
3. ESL-17 :Prabal Basu,Chidhambaranathan R, Aatreyi Bal, Pramesh Pandey,Trevor Carter,Koushik Chakraborty and Sanghamitra Roy,"FIFA: Exploring a Focally Induced Fault Attack Strategy in Near-Threshold Computing",IEEE Embedded Systems Letters, 2017
4. TVLSI-17:Aatreyi Bal, Shamik Saha,Sanghamitra Roy, and Koushik Chakraborty,"Dynamic Choke Sensing for Timing Error Resilience in NTC Systems."IEEE Transactions on Very Large Scale Integration (VLSI) Systems, October2017
5. HASS-17:Rajesh JayashankaraShridevi, Dean Michael Ancajas,Koushik Chakraborty and Sanghamitra Roy, "Security Measures Against a Rogue Network-on-Chip."Journal of Hardware and Systems Security, 2017
6. JOLPE-17:Asmita Pal, Aatreyi Bal, Koushik Chakraborty and Sanghamitra Roy, "Split Latency Allocator: Process Variation-Aware Register Access Latency Boost in a Near-Threshold GPU",Journal of Low Power Electronics, September 2017

Conference

1. DATE-17: Aatreyi Bal, Shamik Saha, Sanghamitra Roy, and Koushik Chakraborty, “Revamping Timing Error Resilience to Tackle Choke Pointsat NTCSystems,”Proceedings of the IEEE/ACM Design Automation and Test in Europe, March 2017, Lausanne, Switzerland.

Conference

1. ICCAD-16:Chidhambaranathan R,Rajesh JayashankaraShridevi,Sanghamitra Roy, and Koushik Chakraborty, "BoostNoC: Power Efficient Network-on-Chip Architecture for Near Threshold Computing", IEEE/ACM International Conference on Computer-aided Design, November 2016, Austin, Texas.

2. DAC-16: Prabal Basu,Hu Chen,Shamik Saha, Koushik Chakraborty, and Sanghamitra Roy, "SwiftGPU: Fostering Energy Efficiency in a Near-Threshold GPU Through Tactical Performance Boost", Proceedings of the 53rd IEEE/ACM Design Automation Conference, June 2016, Austin, Texas, (Acceptance Rate: 19%).

3. DAC-16: Rajesh JayashankaraShridevi, Chidhambaranathan R, Sanghamitra Roy, and Koushik Chakraborty, "Catching the Flu: Emerging threats from a Third Party Power Management Unit", Proceedings of the 53rd IEEE/ACM Design Automation Conference, June 2016, Austin, Texas, (Acceptance Rate: 19%).

4. DAC-16: Atif Yasin,Jeff Zhun, Siddharth Garg, Hu Chen,Sanghamitra Roy, and Koushik Chakraborty, "Synergistic Timing Speculation for Multi-threaded Programs", Proceedings of the 53rd IEEE/ACM Design Automation Conference, June 2016, Austin, Texas, (Acceptance Rate: 19%).

5. DATE-16: Prabal Basu, Rajesh JayashankaraShridevi, Koushik Chakraborty and Sanghamitra Roy, "PRADA: Combating Voltage Noise in the NoC Power Supply Through Flow-Control and Routing Algorithms", Proceedings of the IEEE/ACM Design Automation and Test in Europe, March 2016, Dresden, Germany.

Journal

1. TODAES-15:Hu Chen, Sanghamitra Roy and Koushik Chakraborty, "DARP-MP: Dynamically Adaptable Resilient Pipeline Design in Multicore Processors", ACM Transactions on Design Automation of Electronic Systems, Article No: 3, Vol. 21, Issue: 1, November 2015.

2. JOLPE-15: Dieudonne Manzi Mugisha, Hu Chen, Sanghamitra Roy and Koushik Chakraborty, "Resilient Cache Design for Mobile Processors in the Near-Threshold Regime", Journal of Low Power Electronics, Vol. 11, No. 2, pp. 112-120, June 2015.

Conference

1. NOCS-15: Rajesh JayashankaraShridevi, Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Runtime Detection of a Bandwidth Denial Attack from a Rogue Network-on-Chip", Proceedings of the 9th ACM International Symposium on Networks-on-Chip, September 2015, Vancouver, Canada, Article No. 8 (Acceptance Rate: 24%).

2. ISLPED-15: Rajesh JayashankaraShridevi, Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Tackling Voltage Emergencies in NoC Through Timing Error Resilience", Proceedings of the IEEE International Symposium on Low Power Electronics and Design, July 2015, Rome, Italy, accepted for publication (Acceptance Rate 18.2%).

3. DAC-15: Hu Chen, Dieudonne Manzi, Sanghamitra Roy and Koushik Chakraborty, "Opportunistic Turbo Execution in NTC: Exploiting the Paradigm Shift in Performance Bottlenecks", Proceedings of the 52nd IEEE/ACM Design Automation Conference, June 2015, San Francisco, CA.

Journal

1. TVLSI-14: Dean Michael Ancajas, Kshitij Bhardwaj, and Koushik Chakraborty, Sanghamitra Roy. Wearout Resilient NoCs through Aging Aware Adaptive Algorithms. IEEE Transactions on Very Large Scale Integration Systems (Accepted).

2. TVLSI-14: Jason Allred, Sanghamitra Roy and Koushik Chakraborty, "Dark Silicon Aware Multicore Systems: Employing Design Automation with Architectural Insight", [IEEE Xplore] IEEE Transactions on Very Large Scale Integration Systems, Vol. 22, Issue 5, pp. 1192--1196, May, 2014.

3. TVLSI-14: Yiding Han, Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Exploring High Throughput Computing Paradigm for Global Routing", [IEEE Xplore] IEEE Transactions on Very Large Scale Integration Systems, pp. 155-167, Vol. 22, Issue 1, January 2014.

Conference

1. CODES+ISSS-14: Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Tackling QoS-induced Aging in Exascale Systems through Agile Path Selection", IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis (Nomination for Best Paper Award).

2. DAC-14: Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Fort-NoCs: Mitigating the Threat of a Compromised-NoC", IEEE/ACM 51st Design Automation Conference (Accepted).

3. ISQED-14: Hu Chen, Sanghamitra Roy and Koushik Chakraborty, Exploiting Static and Dynamic Locality of Timing Errors in

   Robust L1 Cache Design.", IEEE/ACM International Symposium on Quality Electronic Design (Accepted).

4. DATE-14: Hu Chen, Sanghamitra Roy and Koushik Chakraborty, "DARP: Dynamically Adaptable Resilient Pipeline Design in Microprocessors", IEEE/ACM Design Automation and Test in Europe (Accepted).

Journal

1. TVLSI-13: Jason Allred,Sanghamitra Roy, and Koushik Chakraborty. Dark Silicon Aware Multicore Systems: Employing Design Automation with Architectural Insight. IEEE Transactions on Very Large Scale Integration Systems (Accepted).

2. JOLPE-13: Satyajit Desai,Sanghamitra Roy, Using Adaptive Body Biasing for Robust Process Variation Aware DRAM Design. Journal of Low Power Electronics, Vol. 9, No. 1, pp. 23-36, April 2013.

Conference

1. ICCD-13:Jason Allred, Sanghamitra Roy, Koushik Chakraborty, "Long Term Sustainability of Differentially Reliable Systems in the Dark Silicon Era", IEEE/ACM 31st International Conference on Computer Design, Oct 2013 (Accepted).

2. ICCD-13:Yiding Han, Koushik Chakraborty, Sanghamitra Roy, "A Global Router on GPU Architecture", IEEE/ACM 31st International Conference on Computer Design, Oct 2013 (Accepted).

3. DAC-13:Koushik Chakraborty, Brennan Cozzens, Sanghamitra Roy, and Dean Michael Ancajas, "Efficiently Tolerating Timing Violations in Pipelined Microprocessors", IEEE/ACM 50th Design Automation Conference (Accepted).

4. DAC-13:Dean Michael Ancajas, James McCabe Nickerson, Koushik Chakraborty, and Sanghamitra Roy, "HCI Tolerant NoC Router Micro-architecture", IEEE/ACM 50th Design Automation Conference (Accepted).

5. DAC-13: Dean Michael Ancajas, Koushik Chakraborty, and Sanghamitra Roy, "DMR3D: Dynamic Memory Relocation in 3D Multicore Systems", IEEE/ACM 50th Design Automation Conference (Accepted).

6. DATE-13:Dean Michael Ancajas, Koushik Chakraborty, and Sanghamitra Roy, "Proactive Aging Management in Heterogeneous NoCs through a Criticality-Driven Routing Approach", IEEE/ACM Design Automation and Test in Europe (Accepted)

Journal

1. TVLSI-12:Yiding Han, Dean Michael Ancajas, Koushik Chakraborty, and Sanghamitra Roy, Exploring High Throughput Computing Paradigm for Global Routing, IEEE Transactions on Very Large Scale Integration Systems (Accepted).

2. TVLSI-12: Koushik Chakraborty and Sanghamitra Roy, "Architecturally Homogeneous Power-Performance Heterogeneous Multicore Systems ", IEEE Transactions on Very Large Scale Integration Systems, accepted for publication.

3. MR-12: Saurabh Kothawade, Koushik Chakraborty, Sanghamitra Roy and Yiding Han, "Analysis of Intermittent Timing Fault Vulnerability", Microelectronics Reliability (Elsevier), accepted for publication.

4. IJE-12: Sanghamitra Roy and Koushik Chakraborty, "Maximizing Energy Efficiency in 3D Multicore Systems: A Formalized Approach", International Journal of Electronics, accepted for publication.

Conference

1. ICCD-12: Saurabh Kothawade, Dean Ancajas, Koushik Chakraborty and Sanghamitra Roy. Mitigating NBTI in the Physical Register File through Stress Prediction. Accepted for Publiction at IEEE International Conference on Computer Design, September 2012 (Best Paper Award Nomination - 5 out of 246 submissions)

2. ISLPED-12: Jason Allred, Sanghamitra Roy, and Koushik Chakraborty, "Designing for Dark Silicon: A Methodological Perspective on Energy Efficient Systems" accepted for publication in the Proceedings of the International Symposium of Low Power Electronics and Design, August 2012, Redondo Beach, California

3. DAC-12: Sanghamitra Roy and Koushik Chakraborty, "Predicting Timing Violations Through Instruction Level Path Sensitization Analysis" accepted for publication at the 49th IEEE/ACM Design Automation Conference, June 2012, San Francisco, California.

4. DAC-12: Kshitij Bhardwaj, Koushik Chakraborty and Sanghamitra Roy, Towards Graceful Aging Degradation in NoCs Through an Adaptive Routing Algorithm" accepted for publication at the 49th IEEE/ACM Design Automation Conference, June 2012, San Francisco, California.

5. DATE-12: Kshitij Bhardwaj, Koushik Chakraborty and Sanghamitra Roy, "An MILP-Based Aging-Aware Routing Algorithm for NoCs" accepted for publication at the IEEE/ACM Design Automation and Test in Europe, March 2012, Dresden, Germany (Acceptance Rate 27%).

6. ISQED-12: Satyajit Desai, Sanghamitra Roy and Koushik Chakraborty, Process Variation Aware DRAM Design Using Block Based Adaptive Body Biasing Algorithm, IEEE International Symposium onQuality Electronic Design (ISQED), March 2012.

7. ISQED-12: Kshitij Bhardwaj, Sanghamitra Roy and Koushik Chakraborty, Power-Performance Yield Optimization for MPSoCs Using MILP, IEEE International Symposium on Quality Electronic Design(ISQED), March 2012.

Journal

1. JOLPE-11 Microprocessor Power Supply Noise Aware Floorplanning using a Circuit-Architectural Framework", Mandar Padmavar, Sanghamitra Roy and Koushik Chakraborty, Journal of Low Power Electronics, Volume 7, No. 3, August 2011

1. TVLSI-11 Stack Aware Threshold Voltage Assignment in 3D Multicore Designs, Koushik Chakraborty and Sanghamitra Roy, IEEE Transactions on Very Large Scale Integration Systems (Accepted).
2. TODAES-11 Design and Implementation of a Throughput Optimized GPU Floorplanning Algorithm, Yiding Han, Koushik Chakraborty, Sanghamitra Roy and VilasitaKuntamukkala, ACM Transactions on Design Automation of Electronic Systems, Volume 16, Issue 3, No. 23, June 2011 [ACM Portal]
3. TPDS-11 Supporting Overcommitted Virtual Machines Through Hardware Spin Detection, Koushik Chakraborty, Philip M. Wells and Gurindar S. Sohi, IEEE Transactions on Parallel and Distributed Systems (Accepted).
4. MICPRO-11 Exploiting Dynamic Micro-architecture Usage in Gate Sizing, Sanghamitra Roy and Koushik Chakraborty, Elsevier Microprocessors and Microsystems, Volume 35, Issue 4, pp. 417-425 [ScienceDirect]

Conference

1. ICCAD-11: Yiding Han, Dean Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Exploring High Throughput Computing Paradigm for Global Routing" accepted for publication at the 2011 International Conference on Computer-Aided Design, pp. 298-305, November 2011, San Jose, California (Acceptance Rate 30%).
2. DATE-11: Koushik Chakraborty and Sanghamitra Roy, "Topologically Homogeneous Power-Performance Heterogeneous Multicore Systems", [IEEE Xplore] Proceedings of the IEEE Design Automation and Test in Europe, pp. 1-6, March 2011, Grenoble, France (Acceptance Rate 25%) Best Paper Award Nomination (5 out of 789 submissions = 0.63%).
3. ISQED-11: Mandar Padmawar, Sanghamitra Roy and Koushik Chakraborty, "Integrated Circuit-Architectural Framework for PSN Aware Floorplanning in Microprocessors", [IEEE Xplore] Proceedings of the 12th IEEE International Symposium on Quality Electronic Design, pp. 212-218,March 2011, Santa Clara, California (Acceptance Rate 31.7%).
4. ISQED-11: Yiding Han, Sanghamitra Roy and Koushik Chakraborty, "Optimizing Simulated Annealing on GPU: A Case Study with IC Floorplanning", [IEEE Xplore] Proceedings of the12th IEEE International Symposium on Quality Electronic Design, pp. 263-269,March 2011, Santa Clara, California (Acceptance Rate 31.7%).
5. ISQED-11: Saurabh Kothawade, Koushik Chakraborty and Sanghamitra Roy, "Analysis and Mitigation of NBTI Aging in Register File: An End-To-End Approach", [IEEE Xplore] Proceedings of the 12th IEEE International Symposium on Quality Electronic Design, pp. 1-7, March 2011, Santa Clara, California (Acceptance Rate 31.7%).
6. VLSID-11: YidingHan, Koushik Chakraborty, Sanghamitra Roy and VilasitaKuntamukkala, "A GPU Floorplanning Algorithm: Specification, Analysis and Optimization", [IEEE Xplore] Proceedings of the IEEE/ACM 24th International Conference on VLSI Design, pp. 159-164, January, 2011 Chennai, India (Acceptance Rate 20%).

Journal

1. JOLPE-10 A Novel Threshold Voltage Assignment for 3D Multicore Designs, Koushik Chakraborty and Sanghamitra Roy, Journal of Low Power Electronics, Volume 6, No. 3, pp 436-446, October 2010.

Conference

1. ICCD-10 Microarchitecture Aware Gate Sizing: A Framework for Circuit-Architecture Co-Optimization, Sanghamitra Roy and Koushik Chakraborty, 28th IEEE International Conference on Computer Design (ICCD), October 2010, Amsterdam, Netherlands (Acceptance Rate 29.6%), pp 804-811. [IEEEXplore]
2. ISQED-10 A Convex Optimization Framework for Leakage Aware Thermal Provisioning in 3D Multicore Architectures", Sanghamitra Roy and Koushik Chakraborty, 11th IEEE International Symposium on Quality Electronic Design (ISQED), pp 804-811, March 2010. (Acceptance Rate: 32.7%) [IEEEXplore]
3. VLSID-10 Rethinking Threshold Voltage Assignment in 3D Multicore Designs, Koushik Chakraborty and Sanghamitra Roy, 23rd IEEE/ACM International VLSI Design Conference, 2010, pp 375-380. Best Paper Award Nomination (5 out of 320 submissions: 1.56%). [IEEEXplore]