Journal Publications (USU students in Italics)

  1. JOLPE-15: Dieudonne Manzi Mugisha, Hu Chen, Sanghamitra Roy and Koushik Chakraborty, "Resilient Cache Design for Mobile Processors in the Near-Threshold Regime", Journal of Low Power Electronics, Vol. 11, No. 2, pp. 112-120, June 2015.
  2. TODAES-15: Hu Chen, Sanghamitra Roy and Koushik Chakraborty, "DARP-MP: Dynamically Adaptable Resilient Pipeline Design in Multicore Processors", ACM Transactions on Design Automation of Electronic Systems, Article No: 3, Vol. 21, Issue: 1, November 2015.
  3. TVLSI-14: Dean Michael Ancajas, Kshitij Bhardwaj and Koushik Chakraborty and Sanghamitra Roy, "Wearout Resilience in NoCs through an Aging Aware Adaptive Routing Algorithm ", IEEE Transactions on Very Large Scale Integration Systems, DOI: 10.1109/TVLSI.2014.2305335, March 2014.
  4. TVLSI-14: Jason Allred, Sanghamitra Roy and Koushik Chakraborty, "Dark Silicon Aware Multicore Systems: Employing Design Automation with Architectural Insight", [IEEE Xplore] IEEE Transactions on Very Large Scale Integration Systems, Vol. 22, Issue 5, pp. 1192--1196, May, 2014.
  5. TVLSI-14: Yiding Han, Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Exploring High Throughput Computing Paradigm for Global Routing", [IEEE Xplore] IEEE Transactions on Very Large Scale Integration Systems, pp. 155-167, Vol. 22, Issue 1, January 2014.
  6. TVLSI-13: Koushik Chakraborty and Sanghamitra Roy, "Architecturally Homogeneous Power-Performance Heterogeneous Multicore Systems ", [IEEE Xplore] IEEE Transactions on Very Large Scale Integration Systems, pp. 670-679, Vol. 21, Issue 4, April 2013.
  7. JOLPE-13: Satyajit Desai and Sanghamitra Roy, "Using Adaptive Body Biasing for Robust Process Variation Aware DRAM Design", Journal of Low Power Electronics, Vol. 9, No. 1, pp. 23-36, April 2013.
  8. TVLSI-12: Koushik Chakraborty and Sanghamitra Roy, "Stack Aware Threshold Voltage Assignment in 3D Multicore Designs", [IEEE Xplore] IEEE Transactions on Very Large Scale Integration Systems, Vol. 20,No. 3, pp. 512-522, March 2012.
  9. MR-12: Saurabh Kothawade, Koushik Chakraborty, Sanghamitra Roy and Yiding Han, "Analysis of Intermittent Timing Fault Vulnerability", Microelectronics Reliability (Elsevier), Vol. 52, Issue 7, pp. 1515-1522, July, 2012.
  10. IJE-12: Sanghamitra Roy and Koushik Chakraborty, "Maximizing Energy Efficiency in 3D Multicore Systems: A Formalized Approach", International Journal of Electronics, accepted for publication.
  11. JOLPE-11: Mandar Padmawar, Sanghamitra Roy and Koushik Chakraborty, "Microprocessor Power Supply Noise Aware Floorplanning using a Circuit-Architectural Framework", Journal of Low Power Electronics, pp. 303-313, Vol. 7, No. 3, August 2011.
  12. MICPRO-11: Sanghamitra Roy and Koushik Chakraborty, "Exploiting dynamic micro-architecture usage in gate sizing", [ACM Portal] Microprocessor and Microsystems: Embedded Hardware Design (Elsevier), Vol. 35, Issue 4, pp. 417-425, June 2011.
  13. TODAES-11: Yiding Han, Koushik Chakraborty, Sanghamitra Roy and Vilasita Kuntamukkala, "Design and Implementation of a Throughput Optimized GPU Floorplanning Algorithm", [ACM Portal] ACM Transactions on Design Automation of Electronic Systems, Vol. 16, Issue 3, pp. 23:1-23:21, June 2011.
  14. JOLPE-10: Koushik Chakraborty and Sanghamitra Roy, "A Novel Threshold Voltage Assignment for 3D Multicore Designs", Journal of Low Power Electronics, Vol. 6, No. 3, pp. 436-446, October 2010.
  15. TCAD-07: Sanghamitra Roy, Weijen Chen, Charlie Chung-Ping Chen and Yu Hen Hu, "Numerically convex forms and their application in gate-sizing", [IEEE Xplore] IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 26, No. 9, pp. 1637-1647, September 2007.
  16. TC-05: Sanghamitra Roy and Prith Banerjee, "An Algorithm for Trading off Quantization Error with Hardware Resources for MATLAB based FPGA Design", [IEEE Xplore] IEEE Transactions on Computers, Vol. 54, Issue 7, pp. 886-896, July 2005.
  17. PRL-03: Biswajit Sarkar, Sanghamitra Roy and Debranjan Sarkar, "Hierarchical Representation of digitized curves through dominant point detection", [ACM Portal] Pattern Recognition Letters, Vol. 24, Issue 15, pp. 2869-2882, November 2003.

Peer-Reviewed Conference Publications (6-10 double column pages in proceedings, USU students in Italics)

  1. ICCAD-16: Chidhambaranathan R, Rajesh JayashankaraShridevi, Sanghamitra Roy, and Koushik Chakraborty, "BoostNoC: Power Efficient Network-on-Chip Architecture for Near Threshold Computing", IEEE/ACM International Conference on Computer-aided Design, November 2016, Austin, Texas, accepted for publication
  2. DAC-16: Prabal Basu, Hu Chen, Shamik Saha, Koushik Chakraborty, and Sanghamitra Roy, "SwiftGPU: Fostering Energy Efficiency in a Near-Threshold GPU Through Tactical Performance Boost", Proceedings of the 53rd IEEE/ACM Design Automation Conference, June 2016, Austin, Texas, accepted for publication.
  3. DAC-16: Rajesh JayashankaraShridevi, Chidhambaranathan R, Sanghamitra Roy, and Koushik Chakraborty, "Catching the Flu: Emerging threats from a Third Party Power Management Unit", Proceedings of the 53rd IEEE/ACM Design Automation Conference, June 2016, Austin, Texas, accepted for publication.
  4. DAC-16: Atif Yasin, Jeff Zhun, Siddharth Garg, Hu Chen, Sanghamitra Roy, and Koushik Chakraborty, "Synergistic Timing Speculation for Multi-threaded Programs", Proceedings of the 53rd IEEE/ACM Design Automation Conference, June 2016, Austin, Texas, accepted for publication.
  5. DATE-16: Prabal Basu, Rajesh JayashankaraShridevi, Koushik Chakraborty and Sanghamitra Roy, "PRADA: Combating Voltage Noise in the NoC Power Supply Through Flow-Control and Routing Algorithms", Proceedings of the IEEE/ACM Design Automation and Test in Europe, March 2016, Dresden, Germany (Accepted for publication).
  6. NOCS-15: Rajesh JayashankaraShridevi, Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Runtime Detection of a Bandwidth Denial Attack from a Rogue Network-on-Chip", Proceedings of the 9th ACM International Symposium on Networks-on-Chip, September 2015, Vancouver, Canada, Article No. 8 (Acceptance Rate: 24%).
  7. ISLPED-15: Rajesh JayashankaraShridevi, Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Tackling Voltage Emergencies in NoC Through Timing Error Resilience", Proceedings of the IEEE International Symposium on Low Power Electronics and Design, July 2015, Rome, Italy, accepted for publication (Acceptance Rate 18.2%).
  8. DAC-15: Hu Chen, Dieudonne Manzi, Sanghamitra Roy and Koushik Chakraborty, "Opportunistic Turbo Execution in NTC: Exploiting the Paradigm Shift in Performance Bottlenecks", Proceedings of the 52nd IEEE/ACM Design Automation Conference, June 2015, San Francisco, CA, accepted for publication.
  9. CODES-ISSS-14: Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy and Jason Allred, "Tackling QoS-induced Aging in Exascale Systems through Agile Path Selection", Proceedings of the ACM International Conference on Hardware/Software Codesign and System Synthesis, October 2014, India, Best Paper Award Nomination.
  10. DAC-14: Dean Michael Ancajas, Koushik Chakraborty, and Sanghamitra Roy, "Fort-NoCs: Mitigating the threat of a Compromised NoC", Proceedings of the 51st IEEE/ACM Design Automation Conference, June 2014, San Francisco, CA (Acceptance Rate 22%).
  11. DATE-14: Hu Chen, Sanghamitra Roy and Koushik Chakraborty, "DARP: Dynamically Adaptable Resilient Pipeline Design in Microprocessors", Proceedings of the IEEE/ACM Design Automation and Test in Europe, March 2014, Dresden, Germany (Acceptance Rate 23.1%).
  12. ISQED-14: Hu Chen, Sanghamitra Roy and Koushik Chakraborty, "Exploiting static and dynamic locality of timing errors in robust L1 cache design", Proceedings of the 15th IEEE International Symposium on Quality Electronic Design, pp. 9-15,March 2012, Santa Clara, California.
  13. ICCD-13: Jason Allred, Sanghamitra Roy and Koushik Chakraborty, "Long Term Sustainability of Differentially Reliable Systems in the Dark Silicon Era", Proceedings of the 30th IEEE International Conference on Computer Design, pp. 70-77, October 2013, Asheville, NC (Acceptance Rate 25.1%).
  14. ICCD-13: Yiding Han, Koushik Chakraborty and Sanghamitra Roy, "A Global Router on GPU Architecture", Proceedings of the 30th IEEE International Conference on Computer Design, pp. 78-84, October 2013, Asheville, NC (Acceptance Rate 25.1%).
  15. DAC-13: Koushik Chakraborty, Brennan Cozzens, Sanghamitra Roy and Dean Michael Ancajas, "Efficiently Tolerating Timing Violations in Pipelined Microprocessors", Proceedings of the 50th IEEE/ACM Design Automation Conference, June 2013, Austin, Texas (Acceptance Rate 22%).
  16. DAC-13: Dean Michael Ancajas, James McCabe Nickerson, Koushik Chakraborty and Sanghamitra Roy, "HCI Tolerant NoC Router Micro-architecture", Proceedings of the 50th IEEE/ACM Design Automation Conference, June 2013, Austin, Texas (Acceptance Rate 22%).
  17. DAC-13: Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy, "DMR3D: Dynamic Memory Relocation in 3D Multicore Systems", Proceedings of the 50th IEEE/ACM Design Automation Conference, June 2013, Austin, Texas (Acceptance Rate 22%).
  18. DATE-13: Dean Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Proactive Aging Management in Heterogeneous NoCs through a Criticality-driven Routing Approach", accepted for publication at the IEEE/ACM Design Automation and Test in Europe, pp. 1032-1037, March 2013, Grenoble, France (Acceptance Rate 24.8%).
  19. ICCD-12: Saurabh Kothawade, Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Mitigating NBTI in the Physical Register File through Stress Prediction", accepted for publication at the 30th IEEE International Conference on Computer Design, pp. 345-351, October 2012, Montreal, Canada (Acceptance Rate 26.8%) Best Paper Award (5 out of 246 submissions = 2%).
  20. ISLPED-12: Jason Allred, Sanghamitra Roy and Koushik Chakraborty, "Designing for Dark Silicon: A Methodological Perspective on Energy Efficient Systems" Proceedings of the IEEE International Symposium on Low Power Electronics and Design, pp. 255-260, July 2012, Redondo Beach, California (Acceptance Rate 30.1%).
  21. DAC-12: Sanghamitra Roy and Koushik Chakraborty, "Predicting Timing Violations Through Instruction Level Path Sensitization Analysis", Proceedings of the 49th IEEE/ACM Design Automation Conference, pp. 1074-1081, June 2012, San Francisco, California (Acceptance Rate 22%).
  22. DAC-12: Kshitij Bhardwaj, Koushik Chakraborty and Sanghamitra Roy, "Towards Graceful Aging Degradation in NoCs Through an Adaptive Routing Algorithm", Proceedings of the 49th IEEE/ACM Design Automation Conference, pp. 382-391, June 2012, San Francisco, California (Acceptance Rate 22%).
  23. DATE-12: Kshitij Bhardwaj, Koushik Chakraborty and Sanghamitra Roy, "An MILP-Based Aging-Aware Routing Algorithm for NoCs", Proceedings of the IEEE/ACM Design Automation and Test in Europe, pp. 326-331, March 2012, Dresden, Germany (Acceptance Rate 27%).
  24. ISQED-12: Satyajit Desai, Sanghamitra Roy and Koushik Chakraborty, "Process Variation Aware DRAM Design Using Block Based Adaptive Body Biasing Algorithm", Proceedings of the 13th IEEE International Symposium on Quality Electronic Design, pp. 255-261,March 2012, San Jose, California.
  25. ISQED-12: Kshitij Bhardwaj, Sanghamitra Roy and Koushik Chakraborty, "Power-Performance Yield Optimization for MPSoCs Using MILP", Proceedings of the 13th IEEE International Symposium on Quality Electronic Design, pp. 764-771,March 2012, San Jose, California.
  26. ICCAD-11: Yiding Han, Dean Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Exploring High Throughput Computing Paradigm for Global Routing" accepted for publication at the 2011 International Conference on Computer-Aided Design, pp. 298-305, November 2011, San Jose, California (Acceptance Rate 30%).
  27. DATE-11: Koushik Chakraborty and Sanghamitra Roy, "Topologically Homogeneous Power-Performance Heterogeneous Multicore Systems", [IEEE Xplore] Proceedings of the IEEE Design Automation and Test in Europe, pp. 1-6, March 2011, Grenoble, France (Acceptance Rate 25%) Best Paper Award Nomination (5 out of 789 submissions = 0.63%).
  28. ISQED-11: Mandar Padmawar, Sanghamitra Roy and Koushik Chakraborty, "Integrated Circuit-Architectural Framework for PSN Aware Floorplanning in Microprocessors", [IEEE Xplore] Proceedings of the 12th IEEE International Symposium on Quality Electronic Design, pp. 212-218,March 2011, Santa Clara, California (Acceptance Rate 31.7%).
  29. ISQED-11: Yiding Han, Sanghamitra Roy and Koushik Chakraborty, "Optimizing Simulated Annealing on GPU: A Case Study with IC Floorplanning", [IEEE Xplore] Proceedings of the 12th IEEE International Symposium on Quality Electronic Design, pp. 263-269,March 2011, Santa Clara, California (Acceptance Rate 31.7%).
  30. ISQED-11: Saurabh Kothawade, Koushik Chakraborty and Sanghamitra Roy, "Analysis and Mitigation of NBTI Aging in Register File: An End-To-End Approach", [IEEE Xplore] Proceedings of the 12th IEEE International Symposium on Quality Electronic Design, pp. 1-7, March 2011, Santa Clara, California (Acceptance Rate 31.7%).
  31. VLSID-11: Yiding Han, Koushik Chakraborty, Sanghamitra Roy and Vilasita Kuntamukkala, "A GPU Floorplanning Algorithm: Specification, Analysis and Optimization", [IEEE Xplore] Proceedings of the IEEE/ACM 24th International Conference on VLSI Design, pp. 159-164, January, 2011 Chennai, India (Acceptance Rate 20%).
  32. ICCD-10: Sanghamitra Roy and Koushik Chakraborty, "Microarchitecture Aware Gate Sizing: A Framework for Circuit-Architecture Co-Optimization", [IEEE Xplore] 28th IEEE International Conference on Computer Design, pp. 222-228, October 2010, Amsterdam, Netherlands (Acceptance Rate 29.6%).
  33. ISQED-10: Sanghamitra Roy and Koushik Chakraborty, "A Convex Optimization Framework for Leakage Aware Thermal Provisioning in 3D Multicore Architectures", [IEEE Xplore] Proceedings of the 11th IEEE International Symposium on Quality Electronic Design, pp. 804-811, March 2010, San Jose, California (Acceptance Rate 31.1%).
  34. VLSID-10: Koushik Chakraborty and Sanghamitra Roy, "Rethinking Threshold Voltage Assignment in 3D Multicore Designs", [IEEE Xplore, ACM Portal] Proceedings of the IEEE/ACM 23rd International Conference on VLSI Design, pp. 375-380, January 2010. Best Paper Award Nomination (5 out of 320 submissions = 1.56%).
  35. ASPDAC-08: Sanghamitra Roy, Charlie Chung-Ping Chen and Yu Hen Hu, "An optimal algorithm for sizing sequential circuits for industrial library based designs", [IEEE Xplore, ACM Portal] Proceedings of the 13th IEEE/ACM Asia and South Pacific Design Automation Conference, pp. 148-151, 2008, Seoul, Korea.
  36. ASPDAC-07: Sanghamitra Roy and Charlie Chung-Ping Chen, "SmartSmooth: A linear time convexity preserving smoothing algorithm for numerically convex data with application to VLSI design", [IEEE Xplore, ACM Portal] Proceedings of the 12th IEEE/ACM Asia and South Pacific Design Automation Conference, pp. 559-564, 2007, Yokohama, Japan.
  37. ISQED-06: Sanghamitra Roy and Charlie Chung-Ping Chen, "ConvexSmooth: A simultaneous convex fitting and smoothing algorithm for convex optimization problems", [IEEE Xplore, ACM Portal] Proceedings of the 7th IEEE International Symposium on Quality Electronic Design, pp. 665-670, 2006, San Jose, California.
  38. ICCAD-05: Sanghamitra Roy, Weijen Chen and Charlie Chung-Ping Chen, "ConvexFit: An Optimal Minimum-Error Convex Fitting and Smoothing Algorithm with Application to Gate-Sizing," [IEEE Xplore, ACM Portal] Proceedings of the IEEE/ACM International Conference on Computer Aided Design, pp. 196-203, November 2005, San Jose, California, Best Paper Award Nomination.
  39. DAC-04: Sanghamitra Roy and Prith Banerjee, "An Algorithm for Converting Floating Point Computations to Fixed-Point in MATLAB based FPGA design", [IEEE Xplore, ACM Portal] Proceedings of the 41st IEEE/ACM Design Automation Conference, pp. 484-487, 2004, San Diego, California.

Posters, Workshops and Work-in-Progress (USU students in Italics)

  1. ICCD-12: Yiding Han, Koushik Chakraborty and Sanghamitra Roy, "DOC: Fast and accurate congestion analysis for global routing", Proceedings of the 30th IEEE International Conference on Computer Design, pp. 508-509, October 2012, Montreal, Canada.
  2. DAC-12: Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy, "DMR3D: Dynamic Memory Relocation in 3-D Multicore Systems ", Work-in-progress (WIP), 49th IEEE/ACM Design Automation Conference, 2012, San Francisco, California.
  3. DAC-08: Sanghamitra Roy, "Numerically convex forms and their application in gate-sizing", 11th Annual ACM SIGDA PhD Forum at IEEE/ACM Design Automation Conference, 2008, Anaheim, California.
  4. FPGA-04: Sanghamitra Roy, Debjit Sinha and Prith Banerjee, "An Algorithm for Trading off Quantization Error with Hardware Resources for MATLAB based FPGA design", [ACM Portal] Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004, Monterey, California.

Book chapters

  1. Sanghamitra Roy and Charlie Chung-Ping Chen, "Wire Sizing", Handbook of Algorithms for Physical Automation, C.J. Alpert, D.P. Mehta, and S.S. Sapatnekar, CRC Press, 2008.