ECE 5530: Digital System Design (Fall 2010)

Description: This course introduces the use of the Verilog hardware description language and automated synthesis in design. The course covers advanced principles for designing digital systems. This course involves extensive use of industry standard design tools. Laboratory work is required.

Prerequisites: ECE 2700

Instructor: Sanghamitra Roy, Office: EL 255C, email: sanghamitra DOT roy AT usu DOT edu

Office hours: Tuesdays: 3.00pm-4.00pm, Thursdays: 9am-10am(or by appointment)

Syllabus: ECE 5530 Syllabus

Schedule: ECE 5530 Schedule

Textbook: Michael D. Ciletti, Advanced Digital Design with the Verilog HDL, Second Edition, Prentice Hall, 2010.

Lectures: TR 7.30am-8.45am, ENGR 108

Teaching Assistants: TBD

Course wiki: (Course materials are available in the wiki)

I would like to thank Prof. Katherine Compton at the University of Wisconsin-Madison for sharing her course materials.