Patents
Runtime detection of a bandwidth denial attack from a rogue interconnect
Rajesh Jayashankara Shridevi, Dean Michael, Ancajas, Koushik Chakraborty, and Sanghamitra Roy
Patent Allowed, No. US 10057281B2, Allowance Date: 7/16/2018
Error Resilient Pipeline
Koushik Chakraborty, Sanghamitra Roy and Hu Chen,
Patent Issued,No. US 9727342 B2, Patent Date: 8/8/2017
Mitigating a Compromised Network on Chip
Dean M. Ancajas, Koushik Chakraborty; and Sanghamitra Roy
Patent Issued, No. US 9652611 B2, File Date: 5/16/2017.
Global Router Using Graphics Processing Unit
Yiding Han, Koushik Chakraborty, and Sanghamitra Roy
Patent Issued, No. US 9396302 B2, Patent Date: 7/19/2016.
Sustainable Differentially Reliable Architecture for Dark Silicon
Jason Allred, Koushik Chakraborty, and Sanghamitra Roy
Patent Issued, No. US 9213577 B2, Patent Date: 12/15/2015.
An MILP-Based Aging-Aware Routing Algorithm for NoCs
Kshitij Bhardwaj, Koushik Chakraborty, and Sanghamitra Roy
Patent Issued, No. 13/793904, File Date: 3/11/2013.
Predicting Timing Violations Through Instruction Level Path Sensitization Analysis.
Sanghamitra Roy and Koushik Chakraborty
Patent Issued, No. 13/707977, Patent Date: 06/16/2015.
Hot Carrier Injection Tolerant Network on Chip Router Architecture
Koushik Chakraborty, Sanghamitra Roy, and Dean Michael Ancajas
Patent Issued, No. US 101938278B2, Patent Date: 01/13/2919.
Dynamic Memory Relocation
Koushik Chakraborty, Sanghamitra Roy, and Dean Michael Ancajas
Patent Allowed, No. 61/865298, File Date: 8/13/2013.
Aging-Aware Routing for NoCs
Kshitij Bhardwaj, Koushik Chakraborty, and Sanghamitra Roy
Patent Issued, No. US 9344358B2, Patent Date: 5/17/2016.
Architecturally Homogeneous Power-Performance Heterogeneous Multicore Systems
Koushik Chakraborty and Sanghamitra Roy
Patent Issued, No. 13/495961, File Date: 6/13/2012.
System and Method for Circuit Design Floorplanning
Sanghamitra Roy, Koushik Chakraborty, and Yiding Han
Patent Issued, No. 13/013654 File Date: 1/25/2011.